Freescale Semiconductor MCF51QE128RM Answering Machine User Manual


 
MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 67
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Chapter 4 Memory
4.2.1 Flash Module Reserved Memory Locations
Several reserved flash memory locations, shown in Table 4-4, are used for storing values used by
corresponding peripheral registers. These registers include an 8-byte backdoor key that can be used to gain
access to secure memory resources. During reset events, the contents of the flash protection byte
(NVPROT) and flash nonvolatile byte (NVOPT) in the reserved flash memory are transferred into the
corresponding FPROT and FOPT registers in the high-page register area to control security and block
protection options.
0x(FF)FF_9870 SCI2BDH LBKDIE RXEDGIE 0 SBR[12:8]
0x(FF)FF_9871 SCI2BDL SBR[7:0]
0x(FF)FF_9872 SCI2C1 LOOPS SCISWAI RSRC M WAKE ILT PE PT
0x(FF)FF_9873 SCI2C2 TIE TCIE RIE ILIE TE RE RWU SBK
0x(FF)FF_9874 SCI2S1 TDRE TC RDRF IDLE OR NF FE PF
0x(FF)FF_9875 SCI2S2 LBKDIF RXEDGIF 0 RXINV RWUID BRK13 LBKDE RAF
0x(FF)FF_9876 SCI2C3 R8 T8 TXDIR TXINV ORIE NEIE FEIE PEIE
0x(FF)FF_9877 SCI2D Bit 7654321Bit 0
0x(FF)FF_9878 PTCSET PTCSET7 PTCSET6 PTCSET5 PTCSET4 PTCSET3 PTCSET2 PTCSET1 PTCSET0
0x(FF)FF_9879 PTESET PTESET7 PTESET6 PTESET5 PTESET4 PTESET3 PTESET2 PTESET1 PTESET0
0x(FF)FF_987A PTCCLR PTCCLR7 PTCCLR6 PTCCLR5 PTCCLR4 PTCCLR3 PTCCLR2 PTCCLR1 PTCCLR0
0x(FF)FF_987B PTECLR PTECLR7 PTECLR6 PTECLR5 PTECLR4 PTECLR3 PTECLR2 PTECLR1 PTECLR0
0x(FF)FF_987C PTCTOG PTCTOG7 PTCTOG6 PTCTOG5 PTCTOG4 PTCTOG3 PTCTOG2 PTCTOG1 PTCTOG0
0x(FF)FF_987D PTETOG PTETOG7 PTETOG6 PTETOG5 PTETOG4 PTETOG3 PTETOG2 PTETOG1 PTETOG0
0x(FF)FF_987E-
0x(FF)FF_987F
Reserved
Table 4-4. Reserved Flash Memory Addresses
Address
MSB
1
(0x0) (0x1) (0x2)
LSB
2
(0x3)
0x(00)00_03FC
Reserved
FTRIM
(bit 0)
TRIM
0x(00)00_0400
Backdoor comparison key bytes 0–3
byte0 byte1 byte2 byte3
0x(00)00_0404
Backdoor comparison key bytes 4–7
byte4 byte5 byte6 byte7
Table 4-3. High-Page Register Summary (Sheet 5 of 5)
Address
Register
Name
Bit 7654321Bit 0