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MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 421
Appendix A
Revision History
This appendix describes corrections to the MCF51QE128 Reference Manual. For convenience, the
corrections are grouped by revision.
A.1 Changes between Rev. 2 and Rev. 3
Table 29. MCF51QE128RM Rev. 2 to Rev. 3 Changes
Chapter Description
Throughout Formatting, layout, spelling, and grammar corrections.
Added information about the MCF51QE32 device.
Changed the SRAM size for the MCF51QE64 device (was 4 Kbytes, is 8 Kbytes).
Removed the “Preliminary” label from the footer.
Device Overview Corrected the number of ADC channels for the MCF51QE64 device (was 22, is 20).
Corrected the number of ADC channels for the 64-pin package of the MCF51QE64 device (was
22, is 20).
ColdFire Core Corrected the reset value for the D1 register (was different for QE128 and QE64, is
0x1090_0050).
Analog Comparator Updated the chapter contents to include the correct information about the low-power ACMP.