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MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 47
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Chapter 3 Modes of Operation
Figure 3-3. All Allowable Power Mode Transitions for MCF51QE128/64/32
Table 3-2 defines triggers for the various state transitions shown in Figure 3-2.
Table 3-2. Triggers for Transitions Shown in Figure 3-2
Transition # From To Trigger
1
Run LPrun
Configure settings shown in Tabl e 3- 1, switch
LPR=1 last
LPrun Run
Clear LPR
Interrupt when LPWUI=1
Negative transition on enabled BKGD/MS pin.
2
Run Stop2
Pre-configure settings shown in Table 3-1 , execute
STOP instruction
Stop2 Run
Assert zero on PTA5/IRQ/TPM1CLK/RESET
1
or
RTC timeout. Reload environment from RAM
3
LPrun LPwait
Pre-configure settings shown in Table 3-1 , execute
STOP instruction
LPwait LPrun Interrupt when LPWUI=0
4
LPrun Stop3 Execute STOP instruction
Stop3 LPrun Interrupt when LPWUI=0
5
LPwait Run Interrupt when LPWUI=1
Run LPwait Not supported.
6
Run Wait
Pre-configure settings shown in Table 3-1 , execute
STOP instruction
Wait Run Interrupt
7
Run Stop4
Pre-configure settings shown in Table 3-1 , execute
STOP instruction
Stop4 Run Interrupt
Stop3
1
Stop2
LPwait
Stop4
Wait
Run LPrun
48
7
6
2
53
Halt
9
11
10