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MCF51QE128 MCU Series Reference Manual, Rev. 3
18 Freescale Semiconductor
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Section Number Title Page
13.6 Interrupts .......................................................................................................................................275
13.6.1 Byte Transfer Interrupt ....................................................................................................275
13.6.2 Address Detect Interrupt .................................................................................................275
13.6.3 Arbitration Lost Interrupt ................................................................................................275
13.7 Initialization/Application Information ..........................................................................................277
Chapter 14
Real-Time Counter (S08RTCV1)
14.1 Introduction ...................................................................................................................................281
14.1.1 ADC Hardware Trigger ..................................................................................................281
14.1.2 RTC Clock Sources .........................................................................................................281
14.1.3 RTC Modes of Operation ................................................................................................281
14.1.3.1 RTC Status after Stop2 Wakeup ....................................................................281
14.1.3.2 Clocks in Stop Modes ...................................................................................281
14.1.4 RTC Clock Gating ..........................................................................................................281
14.1.5 Interrupt Vector ...............................................................................................................282
14.1.6 Features ...........................................................................................................................284
14.1.7 Modes of Operation ........................................................................................................284
14.1.7.1 Wait Mode .....................................................................................................284
14.1.7.2 Stop Modes ...................................................................................................284
14.1.7.3 Active Background Mode .............................................................................284
14.1.8 Block Diagram ................................................................................................................285
14.2 External Signal Description ..........................................................................................................285
14.3 Register Definition ........................................................................................................................285
14.3.1 RTC Status and Control Register (RTCSC) ....................................................................286
14.3.2 RTC Counter Register (RTCCNT) ..................................................................................287
14.3.3 RTC Modulo Register (RTCMOD) ................................................................................287
14.4 Functional Description ..................................................................................................................287
14.4.1 RTC Operation Example .................................................................................................288
14.5 Initialization/Application Information ..........................................................................................289
Chapter 15
Serial Communications Interface (S08SCIV4)
15.1 Introduction ...................................................................................................................................291
15.1.1 SCI Clock Gating ............................................................................................................291
15.1.2 Interrupt Vectors .............................................................................................................291
15.1.3 Features ...........................................................................................................................295
15.1.4 Modes of Operation ........................................................................................................295
15.1.5 Block Diagram ................................................................................................................296
15.2 Register Definition ........................................................................................................................298
15.2.1 SCI Baud Rate Registers (SCIxBDH, SCIxBDL) ..........................................................298
15.2.2 SCI Control Register 1 (SCIxC1) ...................................................................................299