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ColdFire Core
MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 171
7.3.4.5 Miscellaneous Instruction Execution Times
SUB.L <ea>,Rx 1(0/0) 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) 1(0/0)
SUB.L Dy,<ea> — 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
SUBI.L #imm,Dx 1(0/0) — — — — — — —
SUBQ.L #imm,<ea> 1(0/0) 3(1/1) 3(1/1) 3(1/1) 3(1/1) 4(1/1) 3(1/1) —
SUBX.L Dy,Dx 1(0/0) — — — — — — —
MULS.W <ea>,Dx 9(0/0) 11(1/0) 11(1/0) 11(1/0) 11(1/0) 12(1/0) 11(1/0) 9(0/0)
MULU.W <ea>,Dx 9(0/0) 11(1/0) 11(1/0) 11(1/0) 11(1/0) 12(1/0) 11(1/0) 9(0/0)
MULS.L <ea>,Dx ≤18(0/0) ≤20(1/0) ≤20(1/0) ≤20(1/0) ≤20(1/0) — — —
MULU.L <ea>,Dx ≤18(0/0) ≤20(1/0) ≤20(1/0) ≤20(1/0) ≤20(1/0) — — —
Table 7-18. Miscellaneous Instruction Execution Times
Opcode <EA>
Effective Address
Rn (An) (An)+ -(An) (d16,An) (d8,An,Xn*SF) xxx.wl #xxx
LINK.W Ay,#imm 2(0/1) — — — — — — —
MOV3Q.L #imm,<ea> 1(0/0) 1(0/1) 1(0/1) 1(0/1) 1(0/1) 2(0/1) 1(0/1) —
MOVE.L Ay,USP 3(0/0) — — — — — — —
MOVE.L USP,Ax 3(0/0) — — — — — — —
MOVE.W CCR,Dx 1(0/0) — — — — — — —
MOVE.W <ea>,CCR 1(0/0) — — — — — — 1(0/0)
MOVE.W SR,Dx 1(0/0) — — — — — — —
MOVE.W <ea>,SR 7(0/0) — — — — — — 7(0/0)
2
MOVEC Ry,Rc 9(0/1) — — — — — — —
MOVEM.L <ea>,&list — 1+n(n/0) — — 1+n(n/0) — — —
MOVEM.L &list,<ea> — 1+n(0/n) — — 1+n(0/n) — — —
MVS <ea>,Dx 1(0/0) 2(1/0) 2(1/0) 2(1/0) 2(1/0) 3(1/0) 2(1/0) 1(0/0)
MVZ <ea>,Dx 1(0/0) 2(1/0) 2(1/0) 2(1/0) 2(1/0) 3(1/0) 2(1/0) 1(0/0)
NOP 3(0/0)———— — ——
PEA <ea> — 2(0/1) — — 2(0/1)
4
3(0/1)
5
2(0/1) —
PULSE 1(0/0)———— — ——
STLDSR#imm————— — —5(0/1)
STOP#imm————— — —3(0/0)
3
TRAP#imm————— — —15(1/2)
TPF 1(0/0)———— — ——
Table 7-17. Two Operand Instruction Execution Times (continued)
Opcode <EA>
Effective Address
Rn (An) (An)+ -(An)
(d16,An)
(d16,PC)
(d8,An,Xn*SF)
(d8,PC,Xn*SF)
xxx.wl #xxx