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MCF51QE128 MCU Series Reference Manual, Rev. 3
54 Freescale Semiconductor
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Chapter 3 Modes of Operation
Flash Off SoftNoClk FullNoClk SoftNoClk FullNoClk SoftOn
Port I/O Registers Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
ADC
1,2
Off SoftADACK
(Wake Up)
FULLADACK
(Wake Up)
SoftOn FullOn SoftOn
ACMPx
Off SoftNoClk
(Wake Up)
FullNoClk
(Wake Up)
SoftOn FullOn SoftOn
BDC Off SoftOn On SoftOn FullOn SoftOn
COP Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
Crystal Oscillator RANGE=0
HGO=0
RANGE=0
HGO=0
All Modes RANGE=0
HGO=0
All Modes RANGE=0
HGO=0
ICS Off Stop or FBELP
3
Stop or any
mode
FBELP Any mode FBELP
IICx Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
IRQ
Off
(Wake Up
via POR)
4
SoftNoClk
(Wake Up)
FullNoClk
(Wake Up)
SoftOn FullOn SoftOn
KBIx Off SoftNoClk
(Wake Up)
FullNoClk
(Wake Up)
SoftOn FullOn SoftOn
LVD/ LVW Off
Disabled On
(Wake Up)
Disabled FullOn Disabled
RTC Soft
Regulation,
LPOCLK if
enabled
(Wake Up
via POR)
SoftOn
(Wake Up)
Full
Regulation
LPOCLK,
ICSERCLK or
ICSIRCLK
only
(Wake Up)
SoftOn FullOn SoftOn
SCIx Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
SPIx Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
TPMx Off SoftNoClk FullNoClk SoftOn FullOn SoftOn
Voltage Regulator / PMC
Parital
Shutdown.
1 kHz osc if
enabled
Soft Regulation.
1 kHz osc if
enabled
Full
Regulation
1kHz osc on
SoftOn
1 kHz osc on
FullOn
1 kHz osc on
SoftOn
1 kHz osc on
LPI/O Pins States Held SoftNoClk FullNoClk SoftOn FullOn SoftOn
1
LP mode for the ADC is invoked by setting ADLPC=1. ADACK is selected via the ADCCFG[ADICLK] field in the ADC. See
Chapter 11, “Analog-to-Digital Converter (S08ADC12V1),” for details.
2
LVD must be enabled to run in stop if converting the bandgap channel.
Table 3-4. Low-Power Mode Behavior (continued)
Peripheral
Mode
Stop2 Stop3 Stop4 LPwait Wait LPrun