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MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 41
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44 — PTJ2
45 35 PTF3 ADP13
46 36 PTF2 ADP12
47 37 PTA7 TPM2CH2 ADP9
48 38 PTA6 TPM1CH2 ADP8
49 39 PTE4 RGPIO4
50 40 VDD
51 41 VSS
52 42 PTF1 ADP11
53 43 PTF0 ADP10
54 — PTJ1
55 — PTJ0
56 44 PTD4 KBI2P4
57 45 PTD3 KBI2P3 SS2
58 46 PTD2 KBI2P2 MISO2
59 47 PTA3 KBI1P3 SCL1
2
ADP3
60 48 PTA2 KBI1P2 SDA1 ADP2
61 49 PTA1 KBI1P1 TPM2CH0 ADP1 ACMP1-
62 50 PTA0 KBI1P0 TPM1CH0 ADP0 ACMP1+
63 51 PTC7 RGPIO15 TxD2 ACMP2-
64 52 PTC6 RGPIO14 RxD2 ACMP2+
65 — PTG7 ADP23
66 — PTG6 ADP22
67 — PTG5 ADP21
68 — PTG4 ADP20
69 53 PTE3 RGPIO3 SS1
70 54 PTE2 RGPIO2 MISO1
71 55 PTG3 ADP19
72 56 PTG2 ADP18
73 57 PTG1
74 58 PTG0
75 59 PTE1 RGPIO1 MOSI1
76 60 PTE0 RGPIO0 TPM2CLK SPSCK1
77 61 PTC5 RGPIO13 TPM3CH5 ACMP2O
78 62 PTC4 RGPIO12 TPM3CH4 RSTO
79 63 PTA5 IRQ TPM1CLK RESET
80 64 PTA4
3
ACMP1O BKGD MS
1
SPI1 pins (SS1, MISO1, MOSI1, and SPSCK2) can be repositioned using
SOPT2[SPI1PS]. Default locations are PTB5, PTB4, PTB3, and PTB2, respectively.
Table 2-1. Pin Assignment by Package and Pin Sharing Priority (continued)
Pin
Number
Lowest ←⎯ Priority ⎯→ Highest
80 64 Port Pin Alt 1 Alt 2 Alt 3 Alt 4