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MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 19
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Section Number Title Page
15.2.3 SCI Control Register 2 (SCIxC2) ...................................................................................300
15.2.4 SCI Status Register 1 (SCIxS1) ......................................................................................301
15.2.5 SCI Status Register 2 (SCIxS2) ......................................................................................303
15.2.6 SCI Control Register 3 (SCIxC3) ...................................................................................304
15.2.7 SCI Data Register (SCIxD) .............................................................................................305
15.3 Functional Description ..................................................................................................................305
15.3.1 Baud Rate Generation .....................................................................................................305
15.3.2 Transmitter Functional Description ................................................................................306
15.3.2.1 Send Break and Queued Idle ........................................................................306
15.3.3 Receiver Functional Description ....................................................................................307
15.3.3.1 Data Sampling Technique .............................................................................307
15.3.3.2 Receiver Wakeup Operation .........................................................................308
15.3.3.2.1Idle-Line Wakeup .....................................................................308
15.3.3.2.2Address-Mark Wakeup .............................................................309
15.3.4 Interrupts and Status Flags ..............................................................................................309
15.3.5 Additional SCI Functions ...............................................................................................310
15.3.5.1 8- and 9-Bit Data Modes ...............................................................................310
15.3.5.2 Stop Mode Operation ....................................................................................310
15.3.5.3 Loop Mode ....................................................................................................310
15.3.5.4 Single-Wire Operation ..................................................................................311
Chapter 16
Serial Peripheral Interface (S08SPIV3)
16.1 Introduction ...................................................................................................................................313
16.1.1 SPI Clock Gating ............................................................................................................313
16.1.2 Interrupt Vector ...............................................................................................................313
16.1.3 Features ...........................................................................................................................317
16.1.4 Block Diagrams ..............................................................................................................317
16.1.4.1 SPI System Block Diagram ..........................................................................317
16.1.4.2 SPI Module Block Diagram ..........................................................................318
16.1.5 SPI Baud Rate Generation ..............................................................................................319
16.2 External Signal Description ..........................................................................................................320
16.2.1 SPSCK — SPI Serial Clock ............................................................................................320
16.2.2 MOSI — Master Data Out, Slave Data In ......................................................................320
16.2.3 MISO — Master Data In, Slave Data Out ......................................................................320
16.2.4 SS
— Slave Select ..........................................................................................................320
16.3 Modes of Operation .......................................................................................................................321
16.3.1 SPI in Stop Modes ..........................................................................................................321
16.4 Register Definition ........................................................................................................................321
16.4.1 SPI Control Register 1 (SPIxC1) ....................................................................................321
16.4.2 SPI Control Register 2 (SPIxC2) ....................................................................................322
16.4.3 SPI Baud Rate Register (SPIxBR) ..................................................................................323