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MCF51QE128 MCU Series Reference Manual, Rev. 3
130 Freescale Semiconductor
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Chapter 6 Parallel Input/Output Control
6.7.5.4 Port E Data Clear Register (PTECLR)
6.7.5.5 Port E Toggle Register (PTETOG)
6.7.5.6 Port E Pull Enable Register (PTEPE)
The port E pull enable register enables pull-ups on the corresponding PTE pin. In some cases, a pull-down
device is enabled if pull-downs are supported by an alternate pin function (e.g., KBI).
76543210
R
W PTECLR7 PTECLR6 PTECLR5 PTECLR4 PTECLR3 PTECLR2 PTECLR1 PTECLR0
Reset:00000000
Figure 6-30. Port E Data Clear Register (PTECLR)
Table 6-27. PTECLR Register Field Descriptions
Field Description
7–0
PTECLRn
Data Clear for Port E Bits. Writing 0 to any bit in this location clears the corresponding bit in the data register.
Writing a one to any bit in this register has no effect.
0 Corresponding PTEDn maintains current value.
1 Corresponding PTEDn is cleared.
76543210
R
W PTETOG7 PTETOG6 PTETOG5 PTETOG4 PTETOG3 PTETOG2 PTETOG1 PTETOG0
Reset:00000000
Figure 6-31. Port E Toggle Enable Register (PTETOG)
Table 6-28. PTETOG Register Field Descriptions
Field Description
7–0
PTETOGn
Toggle Enable for Port E Bits. Writing 1 to any bit in this location toggles the corresponding bit in the data register.
Writing a zero to any bit in this register has no effect.
0 Corresponding PTEDn maintains current value.
1 Corresponding PTEDn is toggled once.
76543210
R
PTEPE7 PTEPE6 PTEPE5 PTEPE4 PTEPE3 PTEPE2 PTEPE1 PTEPE0
W
Reset:00000000
Figure 6-32. Internal Pull Enable for Port E Register (PTEPE)