Freescale Semiconductor MCF51QE128RM Answering Machine User Manual


 
MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 119
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Chapter 6 Parallel Input/Output Control
The PTA4 and PTA5 pins are unique. PTA4 is an output only, so the control bits for the input functions do
not have any effect on this pin. PTA5, when configured as an output, is open drain. Therefore, the drive
strength and slew rate controls have no effect on this pin.
6.7.1.1 Port A Data Register (PTAD)
6.7.1.2 Port A Data Direction Register (PTADD)
6.7.1.3 Port A Pull Enable Register (PTAPE)
The port A pull enable register enables pull-ups on the corresponding PTA pin. In some cases, a pull-down
device is enabled if pull-downs are supported by an alternate pin function (e.g., KBI).
76543210
R
PTAD7 PTAD6 PTAD5 PTAD4
1
PTAD3 PTAD2 PTAD1 PTAD0
W
Reset:00000000
1
Reads of bit PTAD4 always return the contents of PTAD4, regardless of the value stored in the PTADD4 bit.
Figure 6-4. Port A Data Register (PTAD)
Table 6-1. PTAD Register Field Descriptions
Field Description
7–0
PTADn
Port A Data Register Bits. For port A pins configured as inputs, reads return the logic level on the pin. For port A
pins configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port A pins configured as outputs, the logic level is driven out
the corresponding MCU pin.
Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
76543210
R
PTADD7 PTADD6 PTADD5 PTADD4
1
PTADD3 PTADD2 PTADD1 PTADD0
W
Reset:00000000
1
PTADD4 has no effect on the output-only PTA4 pin.
Figure 6-5. Port A Data Direction Register (PTADD)
Table 6-2. PTADD Register Field Descriptions
Field Description
7–0
PTADDn
Data Direction for Port A Bits. These read/write bits control the direction of port A pins and what is read for PTAD
reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.