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MCF51QE128 MCU Series Reference Manual, Rev. 3
104 Freescale Semiconductor
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Chapter 5 Resets, Interrupts, and General System Control
5.7.7 System Power Management Status and Control 2 Register
(SPMSC2)
This high page register contains status and control bits to configure the low-power run and wait modes as
well as configure the stop mode behavior of the MCU. See Section 3.7.2, “Low-Power Wait Mode
(LPwait),” and Section 3.8, “Stop Modes,” for more information.
SPMSC2 is not reset when exiting from stop2.
Table 5-8. SPMSC1 Register Field Descriptions
Field Description
7
LVDF
Low-Voltage Detect Flag. If LVDE is set, this read-only status bit indicates a low-voltage detect event.
6
LVDAC K
Low-Voltage Detect Acknowledge. This write-only bit is used to acknowledge low voltage detection errors (write
1 to clear LVDF). Reads always return 0.
5
LVDIE
Low-Voltage Detect Interrupt Enable. This bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF is set.
4
LVDRE
Low-Voltage Detect Reset Enable. This write-once bit enables LVDF events to generate a hardware reset
(provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force an MCU reset when LVDF is set.
3
LVDSE
Low-Voltage Detect Stop Enable. If LVDE is set, this read/write bit determines whether the low-voltage detect
function operates when the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
2
LVDE
Low-Voltage Detect Enable. This write-once bit enables low-voltage detect logic and qualifies the operation of
other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
1 Reserved, must be cleared.
0
BGBE
Bandgap Buffer Enable. This bit enables an internal buffer for the bandgap voltage reference for use by the ADC
module on one of its internal channels or as a voltage reference for ACMP module.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
76543210
R
LPR
LPRS
LPWUI
0 PPDF 0
PPDE
1
PPDC
W PPDACK
Reset:00000010
1
PPDE is a write-once bit that can be used to permanently disable the PPDC bit.
Figure 5-8. System Power Management Status and Control 2 Register (SPMSC2)