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Chapter 18 Version 1 ColdFire Debug (CF1_DEBUG)
MCF51QE128 MCU Series Reference Manual, Rev. 3
Freescale Semiconductor 399
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Read data at the specified memory address. The reference address is transmitted as three 8-bit packets (msb
to lsb) immediately after the command packet. The access attributes are defined by BAAR[TT,TM]. The
hardware forces low-order address bits to zeros for word and longword accesses to ensure these accesses
are on 0-modulo-size alignments. If the with-status option is specified, the core status byte contained in
XCSR[31–24] (XCSR_SB) is returned before the read data. The XCSR status byte reflects the state after
the memory read was performed.
The examples show the READ_MEM.B{_WS}, READ_MEM.W{_WS} and READ_MEM.L{_WS}
commands.
18.4.1.5.12 READ_PSTB
Read 32 bits of captured PST/DDATA values from the trace buffer at the specified address. The PST trace
buffer contains 64 six-bit entries, packed consecutively into 12 longword locations. See Table 18-24 for
the CRN details when CRG is 01.
The write pointer for the trace buffer is available as CSR2[PSTBWA]. Using this pointer, it is possible to
determine the oldest-to-newest entries in the trace buffer.
READ_MEM.sz_WS
Read memory at the specified address with status Non-intrusive
0x31 Address[23-0]
XCSR_SB
Memory
data[7-0]
host →
target
host →
target
D
L
Y
target →
host
target →
host
0x35 Address[23-0] XCSR_SB
Memory
data [15-8]
Memory
data [7-0]
host →
target
host →
target
D
L
Y
target →
host
target →
host
target →
host
0x39 Address[23-0] XCSR_SB
Memory
data[31-24]
Memory
data[23-16]
Memory
data [15-8]
Memory
data [7-0]
host →
target
host →
target
D
L
Y
target →
host
target →
host
target →
host
target →
host
target →
host
Read PST trace buffer at the specified address Non-intrusive
0x50+CRN
PSTB data
[31-24]
PSTB data
[23-16]
PSTB data
[15-8]
PSTB data
[7-0]
host →
target
D
L
Y
target →
host
target →
host
target →
host
target →
host