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MCF51QE128 MCU Series Reference Manual, Rev. 3
36 Freescale Semiconductor
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Chapter 2 Pins and Connections
Figure 2-3. Basic System Connections
V
DD
V
SS
BKGD/MS
RESET/IRQ
OPTIONAL
MANUAL
RESET
PORT
A
V
DD
BACKGROUND HEADER
C2
C1
X1
R
F
R
S
C
BY
0.1 μF
SYSTEM
POWER
PTA0/KBI1P0/TPM1CH0/ADP0/ACMP1+
PTA1/KBI1P1/TPM2CH0/ADP1/ACMP1-
PTA2/KBI1P2/SDA1/ADP2
PTA3/KBI1P3/SCL1/ADP3
PTA4/ACMP1O/BKGD/MS
PTA5/IRQ/TPM1CLK/RESET
PTA6/TPM1CH2/ADP8
PTA7/TPM2CH2/ADP9
PORT
B
PTB0/KBI1P4/RxD1/ADP4
PTB1/KBI1P5/TxD1/ADP5
PTB2/KBI1P6/SPSCK1/ADP6
PTB3/KBI1P7/MOSI1/ADP7
PTB4/TPM2CH1/MISO1
PTB5/TPM1CH1/SS1
PTB6/SDA1/XTAL
PTB7/SCL1/EXTAL
PORT
C
PTC0/RGPIO8/TPM3CH0
PTC1/RGPIO9/TPM3CH1
PTC2/RGPIO10TPM3CH2
PTC3/RGPIO11/TPM3CH3
PTC4/RGPIO12/TPM3CH4/RSTO
PTC5/RGPIO13/TPM3CH5/ACMP2O
PTC6/RGPIO14/RxD2/ACMP2+
D
PTD0/KBI2P0/SPSCK2
PTD1/KBI2P1/MOSI2
PTD2/KBI2P2/MISO2
PTD3/KBI2P3/SS2
PTD4/KBI2P4
PTD5/KBI2P5
PTD6/KBI2P6
PTD7/KBI2P7
PORT
E
PTE0/RGPIO0/TPM2CLK/SPSCK1
PTE1/RGPIO1/MOSI1
PTE2/RGPIO2/MISO1
PTE3/RGPIO3/SS1
PTE4/RGPIO4
PTE5/RGPIO5
PTE6/RGPIO6
PTE7/RGPIO7/TPM3CLK
PORT
H
PTH0
PTH1
PTH2
PTH3
PTH4
PTH5
PTH6/SCL2
PTH7/SDA2
MCF51QE128
V
REFH
V
REFL
C
BYAD
0.1 μF
V
SSAD
V
DDAD
PTC7/RGPIO15/TxD2/ACMP2-
V
DD
V
SS
C
BY
0.1 μF
C
BLK
10 μF
+
3 V
+
PORT
PTF0/ADP10
PTF1/ADP11
PTF2/ADP12
PTF3/ADP13
PTF4/ADP14
PTF5/ADP15
PTF6/ADP16
PTF7/ADP17
PORT
F
PTG0
PTG1
PTG2/ADP18
PTG3/ADP19
PTG4/ADP20
PTG5/ADP21
PTG6/ADP22
PTG7/ADP23
PORT
G
PORT
J
PTJ0
PTJ1
PTJ2
PTJ3
PTJ4
PTJ5
PTJ6
PTJ7
OPTIONAL EXTERNAL OSCILLATOR
OPTIONAL
EMC
PROTECTION
V
DD
4.7 k
Ω
–10 k
Ω
0.1 μF
XTAL
EXTAL
NOTES:
1
RESET pin can only be used to reset into user mode; it cannot be used to enter BDM. Entry into BDM is accomplished by holding BGKD low during
POR or setting CSR2[BDFR] with BGKD held low after issuing the BDM write command.
2
RESET/IRQ features have optional internal pullup device.
3
RC filter on RESET/IRQ pin recommended for noisy environments.
(NOTE 3)
(NOTE 1)
(NOTE 2)