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MCF51QE128 MCU Series Reference Manual, Rev. 3
142 Freescale Semiconductor
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Chapter 6 Parallel Input/Output Control
6.7.11.1 KBI2 Interrupt Status and Control Register (KBI2SC)
6.7.11.2 KBI2 Interrupt Pin Select Register (KBI2PE)
76543210
R0000KBF0
KBIE KBIMOD
W KBACK
Reset:00000000
Figure 6-58. KBI2 Interrupt Status and Control Register (KBI2SC)
Table 6-57. KBI2SC Register Field Descriptions
Field Description
7–4 Reserved, should be cleared.
3
KBF
KBI2 Interrupt Flag. KBF indicates when a KBI2 interrupt is detected. Writes have no effect on KBF.
0 No KBI2 interrupt detected.
1 KBI2 interrupt detected.
2
KBACK
KBI2 Interrupt Acknowledge. Writing a 1 to KBACK is part of the flag clearing mechanism. KBACK always reads
as 0.
1
KBIE
KBI2 Interrupt Enable. KBIE determines whether a KBI2 interrupt is requested.
0 KBI2 interrupt request not enabled.
1 KBI2 interrupt request enabled.
0
KBIMOD
KBI2 Detection Mode. KBIMOD (along with the KBI2ES bits) controls the detection mode of the KBI2 interrupt
pins.
0 KBI2 pins detect edges only.
1 KBI2 pins detect edges and levels.
76543210
R
KBIPE7 KBIPE6 KBIPE5 KBIPE4 KBIPE3 KBIPE2 KBIPE1 KBIPE0
W
Reset:00000000
Figure 6-59. KBI2 Interrupt Pin Select Register (KBI2PE)
Table 6-58. KBI2PE Register Field Descriptions
Field Description
7–0
KBIPEn
KBI2 Interrupt Pin Selects. Each of the KBIPEn bits enable the corresponding KBI2 interrupt pin.
0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.