Filter
Top Products
MCF51QE128 MCU Series Reference Manual, Rev. 3
136 Freescale Semiconductor
Get the latest version from freescale.com
Chapter 6 Parallel Input/Output Control
6.7.8 Port H Registers
Port H is controlled by the registers listed below.
6.7.8.1 Port H Data Register (PTHD)
6.7.8.2 Port H Data Direction Register (PTHDD)
Table 6-41. PTGDS Register Field Descriptions
Field Description
7–0
PTGDSn
Output Drive Strength Selection for Port G Bits. Each of these control bits selects between low and high output
drive for the associated PTG pin. For port G pins configured as inputs, these bits have no effect.
0 Low output drive strength selected for port G bit n.
1 High output drive strength selected for port G bit n.
76543210
R
PTHD7 PTHD6 PTHD5 PTHD4 PTHD3 PTHD2 PTHD1 PTHD0
W
Reset:00000000
Figure 6-45. Port H Data Register (PTHD)
Table 6-42. PTHD Register Field Descriptions
Field Description
7–0
PTHDn
Port H Data Register Bits. For port H pins configured as inputs, reads return the logic level on the pin. For port
H pins configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port H pins configured as outputs, the logic level is driven out
the corresponding MCU pin.
Reset forces PTHD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups disabled.
76543210
R
PTHDD7 PTHDD6 PTHDD5 PTHDD4 PTHDD3 PTHDD2 PTHDD1 PTHDD0
W
Reset:00000000
Figure 6-46. Port H Data Direction Register (PTHDD)
Table 6-43. PTHDD Register Field Descriptions
Field Description
7–0
PTHDDn
Data Direction for Port H Bits. These read/write bits control the direction of port H pins and what is read for PTHD
reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port H bit n and PTHD reads return the contents of PTHDn.