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RL78/G1A CHAPTER 3 CPU ARCHITECTURE
R01UH0305EJ0200 Rev.2.00 54
Jul 04, 2013
3.1.1 Internal program memory space
The internal program memory space stores the program and table data. The RL78/G1A products incorporate internal
ROM (flash memory), as shown below.
Table 3-2. Internal ROM Capacity
Internal ROM Part Number
Structure Capacity
R5F10ExA (x = 8, B, G) 16384 × 8 bits (00000H to 03FFFH)
R5F10ExC (x = 8, B, G, L) 32768 × 8 bits (00000H to 07FFFH)
R5F10ExD (x = 8, B, G, L) 49152 × 8 bits (00000H to 0BFFFH)
R5F10ExE (x = 8, B, G, L)
Flash memory
65536 × 8 bits (00000H to 0FFFFH)
The internal program memory space is divided into the following areas.
(1) Vector table area
The 128-byte area 00000H to 0007FH is reserved as a vector table area. The program start addresses for branch
upon reset or generation of each interrupt request are stored in the vector table area. Furthermore, the interrupt jump
address is a 64 K address of 00000H to 0FFFFH, because the vector code is assumed to be 2 bytes.
Of the 16-bit address, the lower 8 bits are stored at even addresses and the higher 8 bits are stored at odd addresses.
To use the boot swap function, set a vector table also at 01000H to 0107FH.