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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 519
Jul 04, 2013
Figure 12-86. Procedure for Resuming UART Reception
Stop the target for communication or wait
until completes its communication
o
p
eration.
Re-set the register to change the operation
clock setting.
Re-set the register to change the transfer
baud rate setting (setting the transfer clock
by dividing the operation clock (f
MCK
)).
Re-set the registers to change serial mode
registers mn, mr (SMRmn, SMRmr)
setting.
Set the SSmn bit of the target channel to 1 and set
the SEmn bit to 1 (to enable operation). Become
wait for start bit detection.
(Selective)
Re-set the register to change serial
communication operation setting register
mn (SCRmn) setting.
If the FEF, PEF, and OVF flags remain
set, clear them using serial flag clear
trigger register mn (SIRmn).
(Essential)
(Essential)
(Selective)
(Selective)
(Selective)
(Selective)
Enable data input of the target channel
by setting a port register and a port mode
register.
(Essential)
Starting setting for resumption
Changing setting of the SPSm register
Changing setting of the SDRmn
Writing to the SSm
register
Completing resumption setting
Changing setting of the SCRmn register
Clearing error flag
Changing setting of the SMRmn
and SMRmr registers
Setting port
(Essential)
Ye s
No
Completing master
p
re
p
arations?
Caution After is set RXEmn bit to 1 of SCRmn register, set the SSmn = 1 from an interval of at least four
clocks of fMCK.
Remarks 1. If PER0 is rewritten while stopping the master transmission and the clock supply is stopped, wait
until the transmission target (slave) stops or transmission finishes, and then perform initialization
instead of restarting the transmission.
2. m: Unit number (m = 0, 1), n: Channel number (n = 1, 3), mn = 01, 03, 11
r: Channel number (r = n − 1)