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RL78/G1A CHAPTER 1 OUTLINE
• 64-pin plastic VFBGA (4 × 4 mm, 0.4 mm pitch)
Jul 04, 2013
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Index mark
Pin No.
Name Pin No.
Name Pin No. Name Pin No.
Name
A1 P05/TI05/TO05/KR8 C1 P51/ANI25/SO11
/INTP2
E1 P153/ANI11/(KR8) G1 AVDD
A2 P30/ANI27/SCK11
/SCL11/INTP3
/RTC1HZ
C2 P71/SI21/SDA21/KR1 E2 P154/ANI12/(KR9) G2 P25/ANI5/(KR8)
A3 P70/ANI28/SCK21
/SCL21/KR0
C3 P74/SI01/SDA01
/INTP8/KR4
E3 P10/ANI18/SCK00
/SCL00/(KR0)
G3 P24/ANI4/(KR7)
A4 P75/SCK01/SCL01
/INTP9/KR5
C4 P16/TI01/TO01/INTP5 E4 P11/ANI20/SI00
/SDA00/RxD0
/TOOLRxD/(KR1)
G4 P22/ANI2/(KR5)
A5 P77/INTP11/KR7 C5 P15/ANI24/SCK20
/SCL20/(KR5)
E5 P03/ANI16/SI10
/SDA10/RxD1/(KR3)
G5 P130
A6 P61/SDAA0 C6 P63 E6 P41/ANI30/TI07/TO07 G6 P02/ANI17/SO10/TxD1
/(KR2)
A7 P60/SCLA0 C7 VSS E7 RESET G7 P00/TI00/(KR0)
A8 EVDD0 C8 P121/X1 E8 P137/INTP0 G8 P124/XT2/EXCLKS
B1 P50/ANI26 /SI11
/SDA11/INTP1
D1 P13/ANI22/SO20
/TxD2/(KR3)
F1 P150/ANI8 H1 AVSS
B2 P72/SO21/KR2 D2 P06/TI06/TO06/KR9 F2 P151/ANI9/(KR6) H2 P27/ANI7
B3 P73/SO01/KR3 D3 P12/ANI21/SO00
/TxD0/TOOLTxD/(KR2)
F3 P152/ANI10/(KR7) H3 P26/ANI6/(KR9)
B4 P76/INTP10/KR6 D4 P14/ANI23/SI20/
SDA20/RxD2/(KR4)
F4 P21/ANI1/AVREFM H4 P23/ANI3/(KR6)
B5 P31/ANI29/TI03/TO03
/INTP4
D5 P42/TI04/TO04 F5 P04/SCK10/SCL10
/(KR4)
H5 P20/ANI0/AVREFP
B6 P62 D6 P40/TOOL0 F6 P43 H6 P141/PCLBUZ1/INTP7
B7 VDD D7 REGC F7 P01/TO00/(KR1) H7 P140/PCLBUZ0/INTP6
B8 EVSS0 D8 P122/X2/EXCLK F8 P123/XT1 H8 P120/ANI19
Cautions 1. Make EVSS0 pin the same potential as VSS pin.
2. Make V
DD pin the potential that is higher than EVDD0 pin.
3. Connect the REGC pin to Vss via a capacitor (0.47 to 1
μ
F).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. When using the microcontroller for an application where the noise generated inside the microcontroller
must be reduced, it is recommended to supply separate powers to the V
DD and EVDD0 pins and connect
the V
SS and EVSS0 pins to separate ground lines.
3. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O
redirection register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR).
R01UH0305EJ0200 Rev.2.00 11