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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 497
Jul 04, 2013
(2) SNOOZE mode operation (continuous startup)
Figure 12-72. Timing Chart of SNOOZE Mode Operation (Continuous Startup) (Type 1: DAPmn = 0, CKPmn = 0)
SS00
SE00
SWC0
SSEC0 L
SDR00
SCK00 pin
SI00 pin
INTCSI00
TSF00
ST00
CPU operation status
Normal operation
STOP mode
Normal operation
STOP mode
SNOOZE mode SNOOZE mode
Clock request signal
(internal signal)
Shift
register 00
Receive data 1
Receive data 2
Receive data 1
Receive data 2
Reception & shift operation
Reception & shift operation
Data reception Data reception
Read
Note
<2>
<2>
<5><6>
<7>
<5><6>
<8>
<10>
<4>
<3>
<9>
<4>
<1>
<3>
Note Only read received data while SWCm = 1 and before the next edge of the SCKp pin input is detected.
Cautions 1. Before switching to the SNOOZE mode or after reception operation in the SNOOZE mode
finishes, set the STm0 bit to 1 (clear the SEm0 bit, and stop the operation).
And after completion the receive operation, also clearing SWCm bit to 0 (SNOOZE release).
2. When SWCm = 1, BFFm1, OVFm1 flags are not operation.
Remarks 1. <1> to <10> in the figure correspond to <1> to <10> in Figure 12-73 Flowchart of SNOOZE Mode
Operation (Continuous Startup).
2. m = 0; p = 00
<R>
<R>