RL78/G1A CHAPTER 1 OUTLINE
DMA (Direct Memory Access) controller
• 2 channels
• Number of clocks during transfer between 8/16-bit SFR and internal RAM: 2 clocks
Multiplier and divider/multiply-accumulator
• 16 bits × 16 bits = 32 bits (Unsigned or signed)
• 32 bits ÷ 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
Serial interface
• CSI: 2 to 6 channels
• UART/UART (LIN-bus supported): 2 or 3 channels
• I
2
C/Simplified I
2
C communication: 2 to 7 channels
Timer
• 16-bit timer: 8 channels
• 12-bit interval timer: 1 channel
• Real-time clock: 1 channel (calendar for 99 years, alarm function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)
A/D converter
• 8/12-bit resolution A/D converter (V
DD = 1.6 to 3.6 V)
• Analog input: 13 to 28 channels
• Internal reference voltage (1.45 V) and temperature sensor
Note 1
I/O port
• I/O port: 19 to 56 (N-ch open drain I/O [withstand voltage of 6 V]: 2 to 4,
N-ch open drain I/O [V
DD withstand voltage
Note 2
/EVDD withstand voltage
Note 3
]: 6 to 12)
• Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor
• Different potential interface: Can connect to a 1.8/2.5 V device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Others
• On-chip BCD (binary-coded decimal) correction circuit
Notes 1. Can be selected only in HS (high-speed main) mode
2. Products with 25 to 48 pins
3. Products with 64 pins
Remark The functions mounted depend on the product. See 1.6 Outline of Functions.
R01UH0305EJ0200 Rev.2.00 2
Jul 04, 2013