Renesas g1a Answering Machine User Manual


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RL78/G1A CHAPTER 4 PORT FUNCTIONS
R01UH0305EJ0200 Rev.2.00 117
Jul 04, 2013
(2) Setting procedure when using output ports of UART0 to UART2, CSI00, CSI10, and CSI20 functions in N-ch
open-drain output mode
In case of UART0: P12
In case of UART1: P02
In case of UART2: P13
In case of CSI00: P10, P12
In case of CSI10: P02, P04
In case of CSI20: P13, P15
<1> Using an external resistor, pull up externally the output pin to be used to the power supply of the target
device (on-chip pull-up resistor cannot be used).
<2> After reset release, the port mode is the input mode (Hi-Z).
<3> Set the output latch of the corresponding port to 1.
<4> Set the corresponding bit of the POM0 and POM1 registers to 1 to set the N-ch open drain output (V
DD
tolerance
Note 1
/EVDD tolerance
Note 2
) mode.
<5> Enable the operation of the serial array unit and set the mode to the UART/CSI mode.
<6> Set the output mode by manipulating the PM0 and PM1 registers. At this time, the output data is high
level, so the pin is in the Hi-Z state.
Notes 1. For 25- to 48-pin products
2. For 64-pin products
(3) Setting procedure when using I/O ports of IIC00, IIC10, and IIC20 functions with a different potential (1.8 V or
2.5 V)
In case of IIC00: P10, P11
In case of IIC10: P03, P04
In case of IIC20: P14, P15
<1> Using an external resistor, pull up externally the input pin to be used to the power supply of the target
device (on-chip pull-up resistor cannot be used).
<2> After reset release, the port mode is the input mode (Hi-Z).
<3> Set the output latch of the corresponding port to 1.
<4> Set the corresponding bit of the POM0 and POM1 registers to 1 to set the N-ch open drain output (V
DD
tolerance
Note 1
/EVDD tolerance
Note 2
) mode.
<5> Set the corresponding bit of the PIM0 and PIM1 registers to 1 to switch to the TTL input buffer. For V
IH
and VIL, refer to the DC characteristics when the TTL input buffer is selected.
<6> Enable the operation of the serial array unit and set the mode to the simplified I
2
C mode.
<7> Set the corresponding bit of the PM0 and PM1 registers to the output mode (data I/O is possible in the
output mode). At this time, the output data is high level, so the pin is in the Hi-Z state.
Notes 1. For 25- to 48-pin products
2. For 64-pin products
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