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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 445
Jul 04, 2013
(4) Processing flow (in continuous transmission mode)
Figure 12-30. Timing Chart of Master Transmission (in Continuous Transmission Mode)
(Type 1: DAPmn = 0, CKPmn = 0)
SSmn
SEmn
SDRmn
INTCSIp
TSFmn
BFFmn
MDmn0
<1>
(Note)
STmn
SCKp pin
SOp pin
Shift
register mn
Transmit data 2 Transmit data 3
Transmit data 3Transmit data 2Transmit data 1
Transmit data 1
Shift operation Shift operation Shift operation
Data transmissionData transmissionData transmission
<6>
<2> <2> <2><3> <3> <3>
<4>
<5>
Note If transmit data is written to the SDRmn register while the BFFmn bit of serial status register mn (SSRmn) is
1 (valid data is stored in serial data register mn (SDRmn)), the transmit data is overwritten.
Caution The MDmn0 bit of serial mode register mn (SMRmn) can be rewritten even during operation.
However, rewrite it before transfer of the last bit is started, so that it will be rewritten before the
transfer end interrupt of the last transmit data.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), p: CSI number (p = 00, 01, 10, 11, 20, 21),
mn = 00 to 03, 10, 11
<R>
<R>