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RL78/G1A CHAPTER 11 A/D CONVERTER
R01UH0305EJ0200 Rev.2.00 348
Jul 04, 2013
Table 11-1. Settings of ADCS and ADCE Bits
ADCS ADCE A/D Conversion Operation
0 0 Conversion stopped state
0 1 Conversion standby state
1 0 Setting prohibited
1 1 Conversion-in-progress state
Table 11-2. Setting and Clearing Conditions for ADCS Bit
A/D Conversion Mode Set Conditions Clear Conditions
Sequential conversion
mode
When 0 is written to ADCS
Select mode
One-shot conversion
mode
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when
A/D conversion ends.
Sequential conversion
mode
When 0 is written to ADCS
Software
trigger
Scan mode
One-shot conversion
mode
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when
conversion ends on the specified four
channels.
Sequential conversion
mode
When 0 is written to ADCS
Select mode
One-shot conversion
mode
When 0 is written to ADCS
Sequential conversion
mode
When 0 is written to ADCS
Hardware
trigger no-wait
mode
Scan mode
One-shot conversion
mode
When 1 is
written to ADCE
and ADCS
When 0 is written to ADCS
Sequential conversion
mode
When 0 is written to ADCS
Select mode
One-shot conversion
mode
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when
A/D conversion ends.
Sequential conversion
mode
When 0 is written to ADCS
Hardware
trigger wait
mode
Scan mode
One-shot conversion
mode
When 1 is
written to ADCE
and a hardware
trigger is input
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when
conversion ends on the specified four
channels.