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RL78/G1A CHAPTER 5 CLOCK GENERATOR
R01UH0305EJ0200 Rev.2.00 168
Jul 04, 2013
5.6.4 CPU clock status transition diagram
Figure 5-15 shows the CPU clock status transition diagram of this product.
Figure 5-15. CPU Clock Status Transition Diagram
High-speed on-chip oscillator: Woken up
X1 oscillation/EXCLK input: Stops (input port mode)
XT1 oscillation/EXCLKS input: Stops (input port mode)
High-speed on-chip oscillator: Operating
X1 oscillation/EXCLK input: Stops (input port mode)
XT1 oscillation/EXCLKS input: Stops (input port mode)
V
DD
≥ Operation range lower limit voltage
CPU:
High-speed
on-chip oscillator
→ STOP
CPU:
High-speed
on-chip oscillator
→ HALT
CPU: X1
oscillation/EXCLK
input → STOP
High-speed on-chip oscillator: Stops
X1 oscillation/EXCLK input: Stops
XT1 oscillation/EXCLKS input:
Oscillatable
High-speed on-chip oscillator: Operating
X1 oscillation/EXCLK input: Stops
XT1 oscillation/EXCLKS input: Oscillatable
High-speed on-chip oscillator: Operating
X1 oscillation/EXCLK input: Oscillatable
XT1 oscillation/EXCLKS input: Oscillatable
High-speed on-chip oscillator: Stops
X1 oscillation/EXCLK input: Stops
XT1 oscillation/EXCLKS input:
Oscillatable
High-speed on-chip
oscillator: Oscillatable
X1 oscillation/EXCLK input:
Operating
XT1 oscillation/EXCLKS input:
Oscillatable
CPU: Operating
with high-speed
on-chip oscillator
CPU: Operating
with X1 oscillation or
EXCLK input
CPU: Operating
with XT1 oscillation or
EXCLKS input
CPU: X1
oscillation/EXCLK
input → HALT
CPU: XT1
oscillation/EXCLKS
input → HALT
Power ON
Reset release
High-speed on-chip
oscillator: Selectable by CPU
X1 oscillation/EXCLK input:
Operating
XT1 oscillation/EXCLKS input:
Selectable by CPU
High-speed on-chip oscillator: Operating
X1 oscillation/EXCLK input: Selectable by CPU
XT1 oscillation/EXCLKS input: Selectable by CPU
(G)
(D)
(C)
(F)
(I)
(E)
(H)
CPU:
High-speed
on-chip oscillator
→ SNOOZE
(J)
(B)
(A)
High-speed on-chip oscillator:
Selectable by CPU
X1 oscillation/EXCLK input:
Selectable by CPU
XT1 oscillation/EXCLKS input:
Operating
High-speed on-chip oscillator:
Oscillatable
X1 oscillation/EXCLK input:
Oscillatable
XT1 oscillation/EXCLKS input:
Operating
(reset release via external reset or LVD)