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RL78/G1A CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
The number of output pins of the clock output and buzzer output controllers differs, depending on the product.
Output pin 25-pin 32, 48, 64-pin
PCLBUZ0
√ √
PCLBUZ1
− √
Caution Most of the following descriptions in this chapter use the 64-pin as an example.
9.1 Functions of Clock Output/Buzzer Output Controller
The clock output controller is intended for clock output for supply to peripheral ICs. Buzzer output is a function to
output a square wave of buzzer frequency.
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One pin can be used to output a clock or buzzer sound.
Two output pins, PCLBUZ0 and PCLBUZ1, are available.
The PCLBUZn pin outputs a clock selected by clock output select register n (CKSn).
Figure 9-1 shows the block diagram of clock output/buzzer output controller.
Caution It is not possible to output the subsystem clock (f
SUB) from the PCLBUZn pin while the RTCLPC bit of
the subsystem clock supply mode control register (OSMC), which controls the supply of the
subsystem clock, is set to 1 and moreover while HALT mode is set with the subsystem clock (f
SUB)
selected as CPU clock.
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Remark n = 0, 1
R01UH0305EJ0200 Rev.2.00 327
Jul 04, 2013