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9.2 Configuration of Clock Output/Buzzer Output Controller................................................... 329
9.3 Registers Controlling Clock Output/Buzzer Output Controller.......................................... 329
9.3.1 Clock output select registers n (CKSn)....................................................................................... 329
9.3.2 Registers controlling port functions of pins to be used for clock or buzzer output....................... 331
9.4 Operations of Clock Output/Buzzer Output Controller ....................................................... 332
9.4.1 Operation as output pin............................................................................................................... 332
9.5 Cautions of Clock Output/Buzzer Output Controller........................................................... 332
CHAPTER 10 WATCHDOG TIMER ..................................................................................................... 333
10.1 Functions of Watchdog Timer ............................................................................................... 333
10.2 Configuration of Watchdog Timer ......................................................................................... 334
10.3 Register Controlling Watchdog Timer .................................................................................. 335
10.3.1 Watchdog timer enable register (WDTE) .................................................................................... 335
10.4 Operation of Watchdog Timer................................................................................................ 336
10.4.1 Controlling operation of watchdog timer...................................................................................... 336
10.4.2 Setting overflow time of watchdog timer ..................................................................................... 337
10.4.3 Setting window open period of watchdog timer........................................................................... 338
10.4.4 Setting watchdog timer interval interrupt..................................................................................... 339
CHAPTER 11 A/D CONVERTER ......................................................................................................... 340
11.1 Function of A/D Converter ..................................................................................................... 340
11.2 Configuration of A/D Converter ............................................................................................. 343
11.3 Registers Used in A/D Converter........................................................................................... 345
11.3.1 Peripheral enable register 0 (PER0)........................................................................................... 346
11.3.2 A/D converter mode register 0 (ADM0)....................................................................................... 347
11.3.3 A/D converter mode register 1 (ADM1)....................................................................................... 359
11.3.4 A/D converter mode register 2 (ADM2)....................................................................................... 360
11.3.5 12-bit A/D conversion result register (ADCR) ............................................................................. 362
11.3.6 8-bit A/D conversion result register (ADCRH)............................................................................. 363
11.3.7 Analog input channel specification register (ADS)...................................................................... 364
11.3.8 Conversion result comparison upper limit setting register (ADUL).............................................. 366
11.3.9 Conversion result comparison lower limit setting register (ADLL)............................................... 366
11.3.10 A/D test register (ADTES)........................................................................................................... 367
11.3.11 Registers controlling port function of analog input pins............................................................... 368
11.4 A/D Converter Conversion Operations ................................................................................. 369
11.5 Input Voltage and Conversion Results ................................................................................. 371
11.6 A/D Converter Operation Modes............................................................................................ 372
11.6.1 Software trigger mode (select mode, sequential conversion mode) ........................................... 372
11.6.2 Software trigger mode (select mode, one-shot conversion mode).............................................. 373
11.6.3 Software trigger mode (scan mode, sequential conversion mode) ............................................. 374
11.6.4 Software trigger mode (scan mode, one-shot conversion mode)................................................ 375
11.6.5 Hardware trigger no-wait mode (select mode, sequential conversion mode).............................. 376
11.6.6 Hardware trigger no-wait mode (select mode, one-shot conversion mode)................................ 377
11.6.7 Hardware trigger no-wait mode (scan mode, sequential conversion mode) ............................... 378
11.6.8 Hardware trigger no-wait mode (scan mode, one-shot conversion mode).................................. 379
11.6.9 Hardware trigger wait mode (select mode, sequential conversion mode)................................... 380
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