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RL78/G1A CHAPTER 13 SERIAL INTERFACE IICA
13.5.6 Wait
The wait is used to notify the communication partner that a device (master or slave) is preparing to transmit or receive
data (i.e., is in a wait state).
Setting the SCLA0 pin to low level notifies the communication partner of the wait state. When wait state has been
canceled for both the master and slave devices, the next data transfer can begin.
Figure 13-20. Wait (1/2)
(1) When master device has a nine-clock wait and slave device has an eight-clock wait
(master transmits, slave receives, and ACKE0 = 1)
Master
IICA0
SCLA0
Slave
IICA0
SCLA0
ACKE0
Transfer lines
SCLA0
SDAA0
6789 123
Master returns to high
impedance but slave
is in wait state (low level).
Wait after output
of ninth clock
IICA0 data write (cancel wait)
Wait after output
of eighth clock
Wait from slave
Wait from master
FFH is written to IICA0 or WREL0 is set to 1
678 9 123
D2 D1 D0 D7 D6 D5ACK
H
R01UH0305EJ0200 Rev.2.00 594
Jul 04, 2013