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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 506
Jul 04, 2013
(1) Register setting
Figure 12-75. Example of Contents of Registers for UART Transmission of UART
(UART0 to UART2) (1/2)
(a) Serial mode register mn (SMRmn)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SMRmn
CKSmn
0/1
CCSmn
0
0
0
0
0
0
0
0
0
1
0
0
MDmn2
0
MDmn1
1
MDmn0
0/1
Operation clock (fMCK) of channel n
0: Prescaler output clock CKm0 set by the SPSm register
1: Prescaler output clock CKm1 set by the SPSm register
Interrupt source of channel n
0: Transfer end interrupt
1: Buffer empty interrupt
(b) Serial communication operation setting register mn (SCRmn)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SCRmn
TXEmn
1
RXEmn
0
DAPmn
0
CKPmn
0
0
EOCmn
0
PTCmn1
0/1
PTCmn0
0/1
DIRmn
0/1
0
SLCmn1
0/1
SLCmn0
0/1
0
1
DLSmn1
0/1
DLSmn0
0/1
Setting of parity bit
00B: No parity
Setting of stop bit
01B: Appending 1 bit
10B: Appending 2 bits
01B: Appending 0 parity
10B: Appending Even parity
11B: Appending Odd parity
Selection of data transfer sequence
0: Inputs/outputs data with MSB first
1: Inputs/outputs data with LSB first.
(c) Serial data register mn (SDRmn) (lower 8 bits: TXDq)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SDRmn
Baud rate setting
0
Note 1
Transmit data setting
(d) Serial output level register m (SOLm) … Sets only the bits of the target channel.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOLm
0
0
0
0
0
0
0
0
0
0
0
0
0
SOLm2
Note 2
0/1
0
SOLm0
0/1
Non-reverse (normal) transmission
1: Reverse transmission
Notes 1. SCR00 only. This bit is fixed to 1 for the other registers.
2. When UART0 performs 9-bit communication (by setting the DLS001 and DLS000 bits of the SCR00
register to 1), bits 0 to 8 of the SDR00 register are used as the transmission data specification area.
Only following UART0 can be specified for the 9-bit data length.
3. Unit 0 only
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), q: UART number (q = 0 to 2),
mn = 00, 02, 10
2. : Setting is fixed in the UART transmission mode, : Setting disabled (set to the initial value)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
TXDq
<R>