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RL78/G1A CHAPTER 11 A/D CONVERTER
R01UH0305EJ0200 Rev.2.00 347
Jul 04, 2013
11.3.2 A/D converter mode register 0 (ADM0)
This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
The ADM0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 11-3. Format of A/D Converter Mode Register 0 (ADM0)
ADCELV0
Note 1
LV1
Note 1
FR0
Note 1
FR1
Note 1
FR2
Note 1
ADMDADCS
A/D conversion operation control
Stops conversion operation
[When read]
Conversion stopped/standby status
ADCS
0
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ADM0
Address: FFF30H After reset: 00H R/W
Symbol
Specification of the A/D conversion channel selection mode
Select mode
Scan mode
ADMD
0
1
A/D voltage comparator operation control
Note 2
Stops A/D voltage comparator operation
Enables A/D voltage comparator operation
ADCE
0
1
Enables conversion operation
[When read]
While in the software trigger mode: Conversion operation status
While in the hardware trigger wait mode: A/D power supply stabilization wait status +
conversion operation status
1
Notes 1. For details of the FR2 to FR0, LV1, LV0 bits, and A/D conversion, see Table 11-3 A/D Conversion Time
Selection.
2. While in the software trigger mode or hardware trigger no-wait mode, the operation of the A/D voltage
comparator is controlled by the ADCS and ADCE bits, and it takes stabilization wait status from the start
of operation for the operation to stabilize. Therefore, when the ADCS bit is set to 1 after stabilization wait
status or more has elapsed from the time ADCE bit is set to 1, the conversion result at that time has
priority over the first conversion result. If the ADCS bit was set to 1 before the stabilization time elapsed,
ignore the first conversion data.
[Stabilization wait status]
If a high-accuracy channel is selected as the analog input channel: 0.5
μ
s
If a test mode setting (ADTES1 bit of ADTES register = 1) is selected: 0.5
μ
s
If a standard channel is selected as the analog input channel: 2
μ
s
If a temperature sensor output/internal reference voltage output are selected as the analog input channel:
(ADISS bit of ADS register = 1): 2
μ
s
Cautions 1. Change the ADMD, FR2 to FR0, LV1, and LV0 bits while in the conversion stopped status (ADCS = 0,
ADCE = 0).
2. Setting ADCS = 1, ADCE = 0 is prohibited.
3. Do not change the ADCS and ADCE bits from 0 to 1 at the same time by using an 8-bit manipulation
instruction. Be sure to set these bits in the order described in 11.7 A/D Converter Setup Flowchart.
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