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RL78/G1A CHAPTER 6 TIMER ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 211
Jul 04, 2013
6.3.9 Timer output enable register m (TOEm)
The TOEm register is used to enable or disable timer output of each channel.
Channel n for which timer output has been enabled becomes unable to rewrite the value of the TOmn bit of timer
output register m (TOm) described later by software, and the value reflecting the setting of the timer output function
through the count operation is output from the timer output pin (TOmn).
The TOEm register can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of the TOEm register can be set with a 1-bit or 8-bit memory manipulation instruction with TOEmL.
Reset signal generation clears this register to 0000H.
Figure 6-17. Format of Timer Output Enable register m (TOEm)
Address: F01BAH, F01BBH (TOE0) After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TOEm 0 0 0 0 0 0 0 0
TOE
m7
TOE
m6
TOE
m5
TOE
m4
TOE
m3
0
TOE
m1
TOE
m0
TOE
mn
Timer output enable/disable of channel n
0
Disable output of timer.
Without reflecting on TOmn bit timer operation, to fixed the output.
Writing to the TOmn bit is enabled, and level set to TOmn bit is output from the TOmn pin.
1
Enable output of timer.
Reflected in the TOmn bit timer operation, to generate the output waveform.
Writing to the TOmn bit is disabled (writing is ignored).
Caution Be sure to clear bits 15 to 8 to “0”.
Remark m: Unit number (m = 0), n: Channel number (n = 0 to 7 (however, timer input pin (TImn), timer output pin
(TOmn) : n = 0, 1, 3 to 7))