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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 558
Jul 04, 2013
(1) Register setting
Figure 12-110. Example of Contents of Registers for Data Reception of Simplified I
2
C
(IIC00, IIC01, IIC10, IIC11, IIC20, IIC21) (1/2)
(a) Serial mode register mn (SMRmn) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SMRmn
CKSmn
0/1
CCSmn
0
0
0
0
0
0
STSmn
0
Note 1
0
SISmn0
0
Note 1
1
0
0
MDmn2
1
MDmn1
0
MDmn0
0
(b) Serial communication operation setting register mn (SCRmn) … Do not manipulate the bits of this
register, except the TXEmn and
RXEmn bits, during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SCRmn
TXEmn
0
RXEmn
1
DAPmn
0
CKPmn
0
0
EOCmn
0
PTCmn1
0
PTCmn0
0
DIRmn
0
0
SLCmn1
0
Note 2
SLCmn0
1
0
1
DLSmn1
1
Note 3
DLSmn0
1
(c) Serial data register mn (SDRmn) (lower 8 bits: SIOr)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SDRmn
Baud rate setting
Note 4
0
Dummy transmit data setting (FFH)
(d) Serial output register m (SOm) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOm
0
0
0
0
CKOm3
Note 5
0/1
Note 6
CKOm2
Note 5
0/1
Note 6
CKOm1
0/1
Note 6
CKOm0
0/1
Note 6
0
0
0
0
SOm3
Note 5
0/1
Note 6
SOm2
Note 5
0/1
Note 6
SOm1
0/1
Note 6
SOm0
0/1
Note 6
Notes 1. Only provided for the SMR01, SMR03, and SMR11 registers.
2. Only provided for the SCR00, SCR02, and SCR10 registers.
3. Only provided for the SCR00 and SCR01 registers. This bit is fixed to 1 for the other registers.
4. Because the setting is completed by address field transmission, setting is not required.
5. Unit 0 only.
6. The value varies depending on the communication data during communication operation.
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3), r: IIC number (r = 00, 01, 10, 11, 20, 21),
mn = 00 to 03, 10, 11
2. : Setting is fixed in the IIC mode, : Setting disabled (set to the initial value)
0/1: Set to 0 or 1 depending on the usage of the user
SIOr
<R>
<R>