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RL78/G1A CHAPTER 11 A/D CONVERTER
R01UH0305EJ0200 Rev.2.00 363
Jul 04, 2013
11.3.6 8-bit A/D conversion result register (ADCRH)
This register is an 8-bit register that indicate [11:4] bits of ADCR register. The higher 8 bits of 12-bit resolution are
stored
Note
.
The ADCRH register can be read by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Note If the A/D conversion result is outside the range specified by using the A/D conversion comparison function (the
value specified by the ADRCK bit of the ADM2 register and ADUL/ADLL registers; see Figure 11-8), the result is
not stored.
Figure 11-10. Format of 8-bit A/D Conversion Result Register (ADCRH)
Symbol
Address: FFF1FH
Note
After reset: 00H R
FFF1FH FFF1EH
0000
ADCRH
ADCRH
Note The ADCRH data (the lower 4 bits of FFF1FH + the higher 4 bits of FFF1EH) is to be read as a FFF1FH address.
Cautions 1. When writing to the A/D converter mode register 0 (ADM0), analog input channel specification
register (ADS), and A/D port configuration register (ADPC), the contents of the ADCRH register
may become undefined. Read the conversion result following conversion completion before
writing to the ADM0, ADS, and ADPC registers. Using timing other than the above may cause an
incorrect conversion result to be read.
2. If INTAD does not occur, the A/D conversion result is not stored in the ADCRH register.