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RL78/G1A CHAPTER 29 ELECTRICAL SPECIFICATIONS (T
A = −40 to +85°C)
R01UH0305EJ0200 Rev.2.00 865
Jul 04, 2013
29.4 AC Characteristics
(TA = −40 to +85°C, AVDD ≤ VDD ≤ 3.6 V, 1.6 V ≤ EVDD0 ≤ VDD ≤ 3.6 V, VSS = EVSS0 = 0 V)
Items Symbol Conditions MIN. TYP. MAX. Unit
2.7 V ≤ VDD ≤ 3.6 V 0.03125 1
μ
s
HS (high-speed
main) mode
2.4 V ≤ V
DD < 2.7 V 0.0625 1
μ
s
LS (low-speed
main) mode
1.8 V ≤ V
DD ≤ 3.6 V 0.125 1
μ
s
Main system
clock (f
MAIN)
operation
LV (low-voltage
main) mode
1.6 V ≤ V
DD ≤ 3.6 V 0.25 1
μ
s
Subsystem clock (fSUB)
operation
1.8 V ≤ VDD ≤ 3.6 V 28.5 30.5 31.3
μ
s
2.7 V ≤ VDD ≤ 3.6 V 0.03125 1
μ
s
HS (high-speed
main) mode
2.4 V ≤ V
DD < 2.7 V 0.0625 1
μ
s
LS (low-speed
main) mode
1.8 V ≤ V
DD ≤ 3.6 V 0.125 1
μ
s
Instruction cycle (minimum
instruction execution time)
TCY
In the self
programming
mode
LV (low-voltage
main) mode
1.6 V ≤ V
DD ≤ 3.6 V 0.25 1
μ
s
2.7 V ≤ VDD ≤ 3.6 V 1.0 20.0 MHz
2.4 V ≤ VDD < 2.7 V 1.0 16.0 MHz
1.8 V ≤ VDD < 2.4 V 1.0 8.0 MHz
fEX
1.6 V ≤ V
DD < 1.8 V 1.0 4.0 MHz
External system clock
frequency
f
EXS 32 35 kHz
2.7 V ≤ VDD ≤ 3.6 V 24 ns
2.4 V ≤ VDD < 2.7 V 30 ns
1.8 V ≤ VDD < 2.4 V 60 ns
tEXH, tEXL
1.6 V ≤ VDD < 1.8 V 120 ns
External system clock input
high-level width, low-level
width
t
EXHS, tEXLS 13.7
μ
s
TI00, TI01, TI03 to TI07
input high-level width,
low-level width
tTIH, tTIL 1/fMCK+10 ns
Note
2.7 V ≤ EVDD0 ≤ 3.6 V 8 MHz
1.8 V ≤ EVDD0 < 2.7 V 4 MHz
HS (high-speed main)
mode
1.6 V ≤ EV
DD0 < 1.8 V 2 MHz
1.8 V ≤ EVDD0 ≤ 3.6 V 4 MHzLS (low-speed main)
mode
1.6 V ≤ EV
DD0 < 1.8 V 2 MHz
TO00, TO01, TO03 to TO07
output frequency
fTO
LV (low-voltage main)
mode
1.6 V ≤ EV
DD0 ≤ 3.6 V 2 MHz
2.7 V ≤ EVDD0 ≤ 3.6 V 8 MHz
1.8 V ≤ EVDD0 < 2.7 V 4 MHz
HS (high-speed main)
mode
1.6 V ≤ EV
DD0 < 1.8 V 2 MHz
1.8 V ≤ EVDD0 ≤ 3.6 V 4 MHzLS (low-speed main)
mode
1.6 V ≤ EV
DD0 < 1.8 V 2 MHz
1.8 V ≤ EVDD0 ≤ 3.6 V 4 MHz
PCLBUZ0, PCLBUZ1
output frequency
fPCL
LV (low-voltage main)
mode
1.6 V ≤ EV
DD0 < 1.8 V 2 MHz
INTP0 1.6 V ≤ VDD ≤ 3.6 V 1
μ
s Interrupt input high-level
width, low-level width
tINTH, tINTL
INTP1 to INTP11 1.6 V ≤ EV
DD0 ≤ 3.6 V 1
μ
s
1.8 V ≤ EVDD0 ≤ 3.6 V,
1.8 V ≤ AV
DD0 ≤ 3.6 V
250 ns
Key interrupt input high-
level width, low-level width
tKR KR0 to KR9
1.6 V ≤ EV
DD0 < 1.8 V,
1.6 V ≤ AV
DD0 < 1.8 V
1
μ
s
RESET low-level width tRSL 10
μ
s
(Note and Remark are listed on the next page.)