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RL78/G1A CHAPTER 7 REAL-TIME CLOCK
Correction example 1
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Example of correcting from 32772.3 Hz to 32768 Hz (32772.3 Hz – 131.2 ppm)
[Measuring the oscillation frequency]
Note
The oscillation frequency
of each product is measured by outputting about 32.768 kHz from the PCLBUZ0 pin, or
by outputting about 1 Hz from the RTC1HZ pin when the watch error correction register (SUBCUD) is set to its initial
value (00H).
Note See 7.4.5 1 Hz output of real-time clock for the setting procedure of the RTC1Hz output, and see 9.4
Operations of Clock Output/Buzzer Output Controller for the setting procedure of outputting about 32 kHz
from the PCLBUZ0 pin.
[Calculating the correction value]
(When the output frequency from the PCLBUZ0 pin is 32772.3 Hz)
Assume the target frequency to be 32768 Hz (32772.3 Hz–131.2 ppm) and DEV to be 0, because the correctable
range of –131.2 ppm is –63.1 ppm or lower.
The expression for calculating the correction value when DEV is 0 is applied.
Correction value = Number of correction counts in 1 minute ÷ 3
= (Oscillation frequency ÷ target frequency – 1) × 32768 × 60 ÷ 3
= (32772.3 ÷ 32768 – 1) × 32768 × 60 ÷ 3
= 86
[Calculating the values to be set to (F6 to F0)]
(When the correction value is 86)
If the correction value is 0 or larger (when slowing), assume F6 to be 0.
Calculate (F5, F4, F3, F2, F1, F0) from the correction value.
{ (F5, F4, F3, F2, F1, F0) – 1} × 2 = 86
(F5, F4, F3, F2, F1, F0) = 44
(F5, F4, F3, F2, F1, F0) = (1, 0, 1, 1, 0, 0)
Consequently, when correcting from 32772.3 Hz to 32768 Hz (32772.3 Hz – 131.2 ppm), setting the correction
register such that DEV is 0 and the correction value is 86 (bits 6 to 0 of the SUBCUD register: 0101100) results in
32768 Hz (0 ppm).
Figure 7-25 shows the operation when (DEV, F6, F5, F4, F3, F2, F1, F0) is (0, 0, 1, 0, 1, 1, 0, 0).
R01UH0305EJ0200 Rev.2.00 317
Jul 04, 2013