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RL78/G1A CHAPTER 12 SERIAL ARRAY UNIT
R01UH0305EJ0200 Rev.2.00 518
Jul 04, 2013
(2) Operation procedure
Figure 12-84. Initial Setting Procedure for UART Reception
Caution Set the RXEmn bit of SCRmn register to 1, and then be sure to set SSmn to 1 after 4 or more f
MCK
clocks have elapsed.
Figure 12-85. Procedure for Stopping UART Reception
Starting setting to stop
Stop setting is completed
Write 1 to the STmn bit of the target channel.
(SEmn = 0: to operation stop status)
The master transmission is stopped.
Go to the next processing.
Writing the STm register
TSFmn = 0?
If there is any data being transferred, wait for
their completion.
(If there is an urgent must stop, do not wait)
Yes
No
Reset the serial array unit by stopping the
clock supply to it.
Setting the PER0 register
(Essential)
(Selective)
(Selective)
Remark m: Unit number (m = 0, 1), n: Channel number (n = 1, 3), mn = 01, 03, 11
r: Channel number (r = n − 1)
Starting initial setting
Setting the PER0 register
Setting the SPSm register
Setting the SMRmn and SMRmr registers
Setting the SCRmn register
Setting the SDRmn register
Writing to the SSm register
Completing initial setting
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate (setting the
transfer clock by dividing the operation
clock (f
MCK)).
Set the SSmn bit of the target channel to 1 and
set the SEmn bit to 1 (to enable operation).
Become wait for start bit detection.
Setting port
Enable data input of the target channel
by setting a port register and a port
mode register.
<R>