Renesas rl78 Answering Machine User Manual


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RL78/G1A CHAPTER 3 CPU ARCHITECTURE
R01UH0305EJ0200 Rev.2.00 57
Jul 04, 2013
3.1.2 Mirror area
The RL78/G1A mirrors the code flash area of 00000H to 0FFFFH, to F0000H to FFFFFH. The products with 96 KB or
more flash memory mirror the code flash area of 00000H to 0FFFFH or 10000H to 1FFFFH, to F0000H to FFFFFH (the
code flash area to be mirrored is set by the processor mode control register (PMC)).
By reading data from F0000H to FFFFFH, an instruction that does not have the ES register as an operand can be used,
and thus the contents of the code flash can be read with the shorter code. However, the code flash area is not mirrored to
the SFR, extended SFR, RAM, and use prohibited areas.
See 3.1 Memory Space for the mirror area of each product.
The mirror area can only be read and no instruction can be fetched from this area.
The following show examples.
Example R5F10ExE (x = 8, B, G, L) (Flash memory: 64 KB, RAM: 4 KB)
Code flash memory
Code flash memory
Code flash memory
02000H
01FFFH
00000H
0EF00H
0EEFFH
10000H
0FFFFH
Mirror
F0000H
EFFFFH
F0800H
F07FFH
F1000H
F0FFFH
FEF00H
FEEFFH
FFEE0H
FFEDFH
FFF00H
FFEFFH
FFFFFH
Special-function register (SFR)
256 bytes
General-purpose register
32 bytes
RAM
4 KB
Data flash memory
Mirror
(same data as 02000H to 0EEFFH)
Special-function register (2nd SFR)
2 KB
Reserved
F2000H
F1FFFH
Reserved
The PMC register is described below.
For example, 0E789H is mirrored to
FE789H. Data can therefore be read
by MOV A, !E789H, instead of MOV
ES, #00H and MOV A, ES:!E789H.
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