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CHAPTER 12 LCD CONTROLLER/DRIVER
Table 12.3-2 Segment output select register bit functions
Bit Function
Bit 7 Unused bit • The read value is indeterminate.
• Writing to this bit has no effect on the operation.
Bit 6 SEG15:
Segment output
selection bit
• Selects P24/SEG40 to P25/SEG41 to function either as N-ch open-drain I/O ports
(P24 to P25) or as LCD segment outputs (SEG40 to SEG41).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 5 SEG14:
Segment output
selection bit
• Selects P20/SEG36 to P23/SEG39 to function either as N-ch open-drain I/O ports
(P20 to P23) or as LCD segment outputs (SEG36 to SEG39).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 4 SEG13:
Segment output
selection bit
• Selects P17/SEG35 to function either as N-ch open-drain I/O port (P17) or as LCD
segment output (SEG35).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 3 SEG12:
Segment output
selection bit
• Selects P16/SEG34 to function either as N-ch open-drain I/O port (P16) or as LCD
segment output (SEG34).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 2 SEG11:
Segment output
selection bit
• Selects P14/SEG32 to P15/SEG33 to function either as N-ch open-drain I/O ports
(P14 to P15) or as LCD segment outputs (SEG32 to SEG33).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 1 SEG10:
Segment output
selection bit
• Selects P10/SEG28 to P13/SEG31 to function either as N-ch open-drain I/O ports
(P10 to P13) or as LCD segment outputs (SEG28 to SEG31).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.
Bit 0 SEG00:
Segment output
selection bit
• Selects P00/SEG20 to P07/SEG27 to function either as N-ch open-drain I/O ports
(P00 to P07) or as LCD segment outputs (SEG20 to SEG27).
Note:
The setting of this bit MUST be consistent with mask option. This bit cannot
override the mask option.