Fujitsu MB89950/950A Pager User Manual


 
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CHAPTER 12 LCD CONTROLLER/DRIVER
Display RAM
This 42 x 4-bit block of RAM controls the segment output signals. Its contents are automatically read out to
the segment outputs in synchronous with the timing of the selected common signal.
Prescaler
The prescaler generates one of the 4 frame frequencies according to the LCD control register setting.
Timing controller
This block controls the segment and common signals based on the frame frequency and LCD control
register settings.
V/I converter
This circuit generates alternating current waveforms from the voltage signals it receives from the timing
controller to drive the LCD.
Common output driver
This block contains the drivers for the LCD common pins.
Segment output driver
This block contains the drivers for the LCD segment pins.
Voltage divider (optional)
This voltage divider is used to provide the divided LCD driving voltage. The voltage divider can be
connected externally.