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CHAPTER 4 I/O PORTS .................................................................................................. 69
4.1 Overview of I/O Ports .......................................................................................................................... 70
4.2 Port 0 ................................................................................................................................................. 72
4.2.1 Port 0 Data Register (PDR0) ......................................................................................................... 74
4.2.2 Operation of Port 0 ........................................................................................................................ 75
4.3 Port 1 ................................................................................................................................................. 77
4.3.1 Port 1 Data Register (PDR1) ......................................................................................................... 79
4.3.2 Operation of Port 1 ........................................................................................................................ 80
4.4 Port 2 ................................................................................................................................................. 82
4.4.1 Port 2 Data Register (PDR2) ......................................................................................................... 84
4.4.2 Operation of Port 2 ........................................................................................................................ 85
4.5 Port 3 ................................................................................................................................................. 86
4.5.1 Port 3 Data Register (PDR3) ......................................................................................................... 89
4.5.2 Operation of Port 3 ........................................................................................................................ 90
4.6 Port 4 .................................................................................................................................................. 92
4.6.1 Port 4 Registers (PDR4, DDR4) .................................................................................................... 94
4.6.2 Operation of Port 4 ....................................................................................................................... 96
4.7 Program Example for I/O Ports ........................................................................................................... 98
CHAPTER 5 TIMEBASE TIMER ..................................................................................... 99
5.1 Overview of Timebase Timer ........................................................................................................... 100
5.2 Block Diagram of Timebase Timer ................................................................................................... 102
5.3 Timebase Timer Control Register (TBTC) ........................................................................................ 104
5.4 Timebase Timer Interrupt ................................................................................................................. 106
5.5 Operation of Timebase Timer ........................................................................................................... 107
5.6 Notes on Using Timebase Timer ...................................................................................................... 109
5.7 Program Example for Timebase Timer ............................................................................................. 110
CHAPTER 6 WATCHDOG TIMER ................................................................................ 111
6.1 Overview of Watchdog Timer ........................................................................................................... 112
6.2 Block Diagram of Watchdog Timer ................................................................................................... 113
6.3 Watchdog Timer Control Register (WDTC) ...................................................................................... 115
6.4 Operation of Watchdog Timer ........................................................................................................... 116
6.5 Notes on Using Watchdog Timer ...................................................................................................... 118
6.6 Program Example for Watchdog Timer ............................................................................................ 119
CHAPTER 7 8-BIT PWM TIMER ................................................................................... 121
7.1 Overview of 8-bit PWM Timer ........................................................................................................... 122
7.2 Block Diagram of 8-bit PWM Timer .................................................................................................. 124
7.3 Structure of 8-bit PWM Timer .......................................................................................................... 126
7.3.1 PWM Control Register (CNTR) .................................................................................................... 128
7.3.2 PWM Compare Register (COMR) ............................................................................................... 130
7.4 8-bit PWM Timer Interrupts ............................................................................................................... 131
7.5 Operation of Interval Timer Function ................................................................................................ 132
7.6 Operation of PWM Timer Function ................................................................................................... 134
7.7 States in Each Mode during 8-bit PWM Timer Operation ................................................................. 135
7.8 Notes on Using 8-bit PWM Timer ..................................................................................................... 137