Fujitsu MB89950/950A Pager User Manual


 
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CHAPTER 10 UART
10.4.6 Serial Mode Control Register 2 (SMC2)
Serial mode control register 2 (SMC2) selects the division ratio of the baud rate
generator, selects to function as UART or SIO, and enables the baud rate generator.
Serial mode control register 2 (SMC2)
Figure 10.4-7 Serial mode control register 2 (SMC2)
Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Initial value
0024
H
PSEN RESV RSEL PDS1 PDS0 --1-0-00
B
R/W R/W R/W R/W R/W
PDS1 PDS0 Input clock divider selection bits
UART/SIO selection bit
Baud rate generator enable bit
0 0 Divided by 4
0 1 Divided by 6
1 0 Divided by 13
1 1 Divided by 65
RSEL
0 Function as UART
1 Function as SIO
Reserved bit
Always write "0"
PSEN
0 Stops baud rate
generator
1 Starts baud rate
R/W : Readable and writable
: Initial value
: Unused
generator