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1745D–ATARM–04-Nov-05
AT91M55800A
3. Pin Description
Table 3-1. Pin Description
Module Name Function Type
Active
Level Comments
EBI
A0 - A23 Address bus Output –
D0 - D15 Data bus I/O –
NCS0 - NCS7 Chip select Output Low
NWR0 Lower byte 0 write signal Output Low Used in Byte-write option
NWR1 Lower byte 1 write signal Output Low Used in Byte-write option
NRD Read signal Output Low Used in Byte-write option
NWE Write enable Output Low Used in Byte-select option
NOE Output enable Output Low Used in Byte-select option
NUB Upper byte-select Output Low Used in Byte-select option
NLB Lower byte-select Output Low Used in Byte-select option
NWAIT Wait input Input Low
BMS Boot mode select Input – Sampled during reset
AIC
IRQ0 - IRQ5 External interrupt request Input – PIO-controlled after reset
FIQ Fast external interrupt request Input – PIO-controlled after reset
Timer
TCLK0 - TCLK5 Timer external clock Input – PIO-controlled after reset
TIOA0 - TIOA5 Multipurpose timer I/O pin A I/O – PIO-controlled after reset
TIOB0 - TIOB5 Multipurpose timer I/O pin B I/O – PIO-controlled after reset
USART
SCK0 - SCK2 External serial clock I/O – PIO-controlled after reset
TXD0 - TXD2 Transmit data output Output – PIO-controlled after reset
RXD0 - RXD2 Receive data input Input – PIO-controlled after reset
SPI
SPCK SPI clock I/O – PIO-controlled after reset
MISO Master in slave out I/O – PIO-controlled after reset
MOSI Master out slave in I/O – PIO-controlled after reset
NSS Slave select Input Low PIO-controlled after reset
NPCS0 - NPCS3 Peripheral chip select Output Low PIO-controlled after reset
PIO
PA0 - PA29 Parallel I/O port A I/O – Input after reset
PB0 - PB27 Parallel I/O port B I/O – Input after reset
WD NWDOVF Watchdog timer overflow Output Low Open drain
ADC
AD0-AD7 Analog input channels 0 - 7 Analog in –
AD0TRIG ADC0 external trigger Input – PIO-controlled after reset
AD1TRIG ADC1 external trigger Input – PIO-controlled after reset
ADVREF Analog reference Analog ref –