44
1745D–ATARM–04-Nov-05
AT91M55800A
Figure 11-22. 0 Wait States, 8-bit Bus Width, Word Transfer
ADDR
ADDR+1
X B
1
X B
3
B
2
B
1
MCK
A0 - A23
NCS
NRD
D0 - D15
Internal Bus
ADDR+2 ADDR+3
X X B
2
B
1
X B
2
X X X B
1
X B
3
X B
4
B
4
B
3
B
2
B
1
READ ACCESS
· Standard Protocol
· Early Protocol
NRD
X B
1
D0 - D15
X B
2
X B
3
X B
4
WRITE ACCESS
NWR0
NWR1
X B
1
D0 - D15
X B
2
X B
3
X B
4