Atmel AT91M55800A Answering Machine User Manual


 
134
1745D–ATARM–04-Nov-05
AT91M55800A
18.2 Baud Rate Generator
The Baud Rate Generator provides the bit period clock (the Baud Rate clock) to both the
Receiver and the Transmitter.
The Baud Rate Generator can select between external and internal clock sources. The exter-
nal clock source is SCK. The internal clock sources can be either the master clock MCK or the
master clock divided by 8 (MCK/8).
Note: In all cases, if an external clock is used, the duration of each of its levels must be longer than the
system clock (MCK) period. The external clock frequency must be at least 2.5 times lower than
the system clock.
When the USART is programmed to operate in Asynchronous Mode (SYNC = 0 in the Mode
Register US_MR), the selected clock is divided by 16 times the value (CD) written in
US_BRGR (Baud Rate Generator Register). If US_BRGR is set to 0, the Baud Rate Clock is
disabled.
When the USART is programmed to operate in Synchronous Mode (SYNC = 1) and the
selected clock is internal (USCLKS[1] = 0 in the Mode Register US_MR), the Baud Rate Clock
is the internal selected clock divided by the value written in US_BRGR. If US_BRGR is set to
0, the Baud Rate Clock is disabled.
In Synchronous Mode with external clock selected (USCLKS[1] = 1), the clock is provided
directly by the signal on the SCK pin. No division is active. The value written in US_BRGR has
no effect.
Figure 18-2. Baud Rate Generator
Baud Rate
=
Selected Clock
16 x CD
Baud Rate
=
Selected Clock
CD
USCLKS [1]
0
0
1
1
MCK
MCK/8
SCK
CLK
16-bit Counter
0
0
1
Baud Rate
Clock
SYNC
USCLKS [1]
CD
CD
OUT
0
1
Divide
by 16
SYNC
0
1
>1
USCLKS [0]