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1745D–ATARM–04-Nov-05
AT91M55800A
21.0.8 ADC Channel Enable Register
Register Name: ADC_CHER
Access Type: Write-only
Offset: 0x10
• CH: Channel Enable (Code Label ADC_CHx)
0 = No effect.
1 = Enables the corresponding channel.
21.0.9 ADC Channel Disable Register
Register Name: ADC_CHDR
Access Type: Write-only
Offset: 0x14
• CH: Channel Disable (Code Label ADC_CHx)
0 = No effect.
1 = Disables the corresponding channel.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
– – – – – – – –
7 6 5 4 3 2 1 0
– – – –
CH3 CH2 CH1 CH0
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
– – – – – – – –
7 6 5 4 3 2 1 0
– – – –
CH3 CH2 CH1 CH0