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1745D–ATARM–04-Nov-05
AT91M55800A
PIO Controllers called PIOA and PIOB. The PIO controller enables the generation of an inter-
rupt on input change and insertion of a simple input glitch filter on any of the PIO pins.
8.4.5 WD: Watchdog
The Watchdog is built around a 16-bit counter, and is used to prevent system lock-up if the
software becomes trapped in a deadlock. It can generate an internal reset or interrupt, or
assert an active level on the dedicated pin NWDOVF. All programming registers are pass-
word-protected to prevent unintentional programming.
8.4.6 SF: Special Function
The AT91M55800A provides registers which implement the following special functions.
• Chip identification
• RESET status
8.5 User Peripherals
8.5.1 USART: Universal Synchronous/
Asynchronous Receiver Transmitter
The AT91M55800A provides three identical, full-duplex, universal synchronous/asynchronous
receiver/transmitters.
Each USART has its own baud rate generator, and two dedicated Peripheral Data Controller
channels. The data format includes a start bit, up to 8 data bits, an optional programmable par-
ity bit and up to 2 stop bits.
The USART also features a Receiver Timeout register, facilitating variable-length frame sup-
port when it is working with the PDC, and a Time-guard register, used when interfacing with
slow remote equipment.
8.5.2 TC: Timer Counter
The AT91M55800A features two Timer Counter blocks that include three identical 16-bit timer
counter channels. Each channel can be independently programmed to perform a wide range
of functions including frequency measurement, event counting, interval measurement, pulse
generation, delay timing and pulse-width modulation.
The Timer Counters can be used in Capture or Waveform mode, and all three counter chan-
nels can be started simultaneously and chained together.
8.5.3 SPI: Serial Peripheral Interface
The SPI provides communication with external devices in master or slave mode. It has four
external chip selects that can be connected to up to 15 devices. The data length is program-
mable, from 8- to 16-bit.
8.5.4 ADC: Analog-to-digital Converter
The two identical 4-channel 10-bit analog-to-digital converters (ADC) are based on a Succes-
sive Approximation Register (SAR) approach.
Each ADC has 4 analog input pins, AD0 to AD3 and AD4 to AD7, digital trigger input pins
AD0TRIG and AD1TRIG, and provides an interrupt signal to the AIC. Both ADCs share the
analog power supply pins VDDA and GNDA, and the input reference voltage pin ADVREF.