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1745D–ATARM–04-Nov-05
AT91M55800A
18.6 Break
A break condition is a low signal level which has a duration of at least one character (including
start/stop bits and parity).
18.6.1 Transmit Break
The transmitter generates a break condition on the TXD line when STTBRK is set in US_CR
(Control Register). In this case, the character present in the Transmit Shift Register is com-
pleted before the line is held low.
To cancel a break condition on the TXD line, the STPBRK command in US_CR must be set.
The USART completes a minimum break duration of one character length. The TXD line then
returns to high level (idle state) for at least 12-bit periods to ensure that the end of break is cor-
rectly detected. Then the transmitter resumes normal operation.
The BREAK is managed like a character:
• The STTBRK and the STPBRK commands are performed only if the transmitter is ready
(bit TXRDY = 1 in US_CSR)
• The STTBRK command blocks the transmitter holding register (bit TXRDY is cleared in
US_CSR) until the break has started
• A break is started when the Shift Register is empty (any previous character is fully
transmitted). US_CSR.TXEMPTY is cleared. The break blocks the transmitter shift register
until it is completed (high level for at least 12-bit periods after the STPBRK command is
requested)
In order to avoid unpredictable states:
• STTBRK and STPBRK commands must not be requested at the same time
• Once an STTBRK command is requested, further STTBRK commands are ignored until
the BREAK is ended (high level for at least 12-bit periods)
• All STPBRK commands requested without a previous STTBRK command are ignored
• A byte written into the Transmit Holding Register while a break is pending but not started
(bit TXRDY = 0 in US_CSR) is ignored
•It is not permitted to write new data in the Transmit Holding Register while a break is in
progress (STPBRK has not been requested), even though TXRDY = 1 in US_CSR.
• A new STTBRK command must not be issued until an existing break has ended
(TXEMPTY=1 in US_CSR).