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1745D–ATARM–04-Nov-05
AT91M55800A
21.0.5 ADC User Interface
Base Address ADC 0:0xFFFB0000 (Code Label ADC0_BASE)
Base Address ADC 1:0xFFFB4000 (Code Label ADC1_BASE)
Table 21-2. ADC Memory Map
Offset Register Name Access Reset State
0x00 Control Register ADC_CR Write-only –
0x04 Mode Register ADC_MR Read/Write 0
0x08 Reserved – – –
0x0C Reserved – – –
0x10 Channel Enable Register ADC_CHER Write-only –
0x14 Channel Disable Register ADC_CHDR Write-only –
0x18 Channel Status Register ADC_CHSR Read-only 0
0x1C Reserved – – –
0x20 Status Register ADC_SR Read-only 0
0x24 Interrupt Enable Register ADC_IER Write-only –
0x28 Interrupt Disable Register ADC_IDR Write-only –
0x2C Interrupt Mask Register ADC_IMR Read-only 0
0x30 Convert Data Register 0 ADC_CDR0 Read-only 0
0x34 Convert Data Register 1 ADC_CDR1 Read-only 0
0x38 Convert Data Register 2 ADC_CDR2 Read-only 0
0x3C Convert Data Register 3 ADC_CDR3 Read-only 0