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1745D–ATARM–04-Nov-05
AT91M55800A
Figure 11-13. External Wait
Notes: 1. Early Read Protocol
2. Standard Read Protocol
11.8.4 Chip Select Change Wait States
A chip select wait state is automatically inserted when consecutive accesses are made to two
different external memories (if no wait states have already been inserted). If any wait states
have already been inserted, (e.g., data float wait) then none are added.
Figure 11-14. Chip Select Wait
Notes: 1. Early Read Protocol
2. Standard Read Protocol
ADDR
NCS
NWE
MCK
NRD
(1)
(2)
NWAIT
NCS1
NCS2
MCK
Mem 1 Chip Select Wait Mem 2
NRD
NWE
(1) (2)