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1745D–ATARM–04-Nov-05
AT91M55800A
16.9.17 PIO Interrupt Status Register
Register Name: PIO_ISR
Access Type: Read-only
Offset:
0x4C
Reset Value: 0
This register indicates for each pin when a logic value change has been detected (rising or falling edge). This is valid
whether the PIO is selected for the pin or not and whether the pin is an input or an output.
The register is reset to zero following a read, and at reset.
1 = At least one input change has been detected on the corresponding pin since the register was last read.
0 = No input change has been detected on the corresponding pin since the register was last read.
16.9.18 PIO Multi-driver Enable Register
Register Name: PIO_MDER
Access Type: Write-only
Offset:
0x50
This register is used to enable PIO output drivers to be configured as open drain to support external drivers on the same
pin.
1 = Enables multi-drive option on the corresponding pin.
0 = No effect.
31 30 29 28 27 26 25 24
P31 P30 P29 P28 P27 P26 P25 P24
23 22 21 20 19 18 17 16
P23 P22 P21 P20 P19 P18 P17 P16
15 14 13 12 11 10 9 8
P15 P14 P13 P12 P11 P10 P9 P8
76543210
P7 P6 P5 P4 P3 P2 P1 P0
31 30 29 28 27 26 25 24
P31 P30 P29 P28 P27 P26 P25 P24
23 22 21 20 19 18 17 16
P23 P22 P21 P20 P19 P18 P17 P16
15 14 13 12 11 10 9 8
P15 P14 P13 P12 P11 P10 P9 P8
76543210
P7 P6 P5 P4 P3 P2 P1 P0