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1745D–ATARM–04-Nov-05
AT91M55800A
20.7.3 SPI Receive Data Register
Register Name: SP_RDR
Access Type: Read-only
Reset State: 0
Offset: 0x08
• RD: Receive Data (Code Label SP_RD)
Data received by the SPI Interface is stored in this register right-justified. Unused bits read zero.
• PCS: Peripheral Chip Select Status
In Master Mode only, these bits indicate the value on the NPCS pins at the end of a transfer. Otherwise, these bits read
zero.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – –
PCS
15 14 13 12 11 10 9 8
RD
7 6 5 4 3 2 1 0
RD